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| 1/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. touch screen controller ics resistive type touch screen controller ics bu21023gul, bu21023muv, bu21024fv-m description unlike most resistive touch screen cont rollers, the bu21023/ bu21024 4-wire resi stive touch screen controllers enable dual-touch detection and gesture recognition. these intelligent controllers expose a set of regi sters to a host processor and are software configurable. the controllers can detect single point coordinates, dual co ordinates, pinch, spread, rotate left and rotate right gestures, enabling pan and zoom operations in applications that previously had to rely exclusively on capacitive touch technology. resistive touch does not requ ire custom panel development which reduces development cost and results in faster time to mark et across a family of products. features 1) enables single touch, dual touch & gesture re cognition using standard 4-wire resistive touch panels 2) adjustable touch detection threshold allows fi ne tuning of pressure sensitivity for an application 3) enables measurement of single point touch pressure 4) spi and i 2 c like interface for interfacing to host processor 5) programmable interrupt polarity 6) 10-bit adc provides sufficient resolution for finger or stylus inputs 7) firmware for internal cpu may be down loaded from host processor or from an eeprom 8) includes filtering options to eliminate false coordinates 9) built in support for intelligent calibration 10) easy to swap x & y coordinates or adapt to different touch panel connections 11) single 3v power supply 12) available in a range of small package sizes and temperature ranges 13) ideally suited for large volume automot ive, consumer and industrial applications application ? products with a lcd that can benef it from pan and zoom operations. ? smart phones, digital cameras, video ca meras, gps receivers, printers, copiers, automotive navigation panels, touch kiosks ? tablet pcs , notebook computers, lcd displays (with usb interface) line up matrix parameter bu21023gul bu21023muv bu21024fv-m screen 4-wire resistive touch screen 4-wire resistive touch screen 4-wire resistive touch screens maximum detection point 2 2 2 integrated filter process yes yes yes gesture detection yes yes yes supplied voltage range(v) 2.7 3.6 2.7 3.6 2.7 3.6 temperature range( ) -20 85 -20 85 -40 85 host i/f 4-wire spi 2-wire serial 4-wire spi 2-wire serial 4-wire spi 2-wire serial pkg vcsp50l2 vqfn028v5050 ssop-b28 no.11105eat01
technical note 2/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m absolute maxi mum ratings parameter symbol ratings unit condition power supply voltage vdd -0.3 4.5 v input voltage vin vss-0.3 vdd+0.3 v power dissipation bu21023gul pd 830 *1 mw bu21023muv 704 *2 mw bu21024fv-m 850 *3 mw storage temperature range tstg -50 125 *1 derate by 7.04 mw / centigrade when ambient temperature exceeds 25 . measured using epoxy-glass pcb measuring 50x58x1.75 mm *2 derate by 8.30mw / centigrade when ambient temperature exceeds 25 . measured using epoxy-glas s pcb measuring 50x58x1.75mm *3 derate by 8.50mw / centigrade when ambient temperature exceeds 25 . measured using epoxy-glas s pcb measuring 50x58x1.75mm recommended operating conditions parameter symbol ratings unit condition min. typ. max. power supply voltage vdd 2.70 3.00 3.60 v digital core power supply dvdd 1.62 1.80 1.98 v dvdd_ext=h operating temperature range bu21023gul bu21023muv topr -20 25 85 bu21024fv-m -40 25 85 note: the bu21023/bu21024 controllers can be operated with a single 3v vdd supply. it is also possible to supply 1.8v dvdd from an exter nal source if the dvdd_ext pin is connected to logic high. electrical characteristics (ta=25 , vdd=3.00v) parameter symbol limits unit condition min. typ. max. low-level input voltage vil vss-0.5 - 0.2 vdd v high-level input voltage vih 0.8 vdd - vdd+0.5 v low-level output voltage vol - - vss+0.4 v high-level output voltage voh vdd-0.4 - - v standby current ist - - 1 a rstb=l sleep current1 icc1 - 60 100 a dvdd_ext=l sleep current2 icc2 - 10 20 a dvdd_ext=h operating current idd - 4 6 ma no load oscillation frequency freq 18 20 22 mhz resolution ad 1024 1024 bit differential non-linearity error dnl -3.0 - +3.0 lsb integral non-linearity error inl -3.0 - +3.0 lsb technical note 3/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m host-i/f mode (4-wire spi) (sck=scl_sck, si=sda_si, csb=sel_csb, so=so) condition : vdd = 3.0v ta=25 parameter symbol limits unit condition min. typ. max. csb setup time t 1 30 - - ns sck "h" level period t 2 30 - - ns sck "l" level period t 3 30 - - ns si setup time t 4 20 - - ns si holding time t 5 20 - - ns csb holding time t 6 20 - - ns csb "h" level time t 7 50 - - ns data output delay time t 8 - - 15 ns sck frequency t 9 - - 15 mhz note: spi interface is selected by tying ifsel pin to logic low. ifsel= logic high selects the 2-wire interface technical note 4/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m host-i/f mode (2-wire serial) (scl=scl_sck, sda=sda_si) the 2-wire serial mode presents an i 2 c like interface for all practical purposes, but it is not a complete implementation conforming to the i 2 c specification. the bu21023muv/ bu21023gul / bu21024fv-m devices can co-exist with other i 2 c devices on the same bus. the slave address for 2-wire serial communication is 5ch or 5dh. this is determined by the sel_csb pin. sel_csb = ?l? : slave address = 5ch sel_csb = ?h? : slave address = 5dh parameter symbol limits unit condition min. typ. max. scl clock frequency f scl 0 - 400 khz start condition hold time t hd:sta 0.6 - - s scl ?l? t low 1.3 - - s scl ?h? t high 0.6 - - s data hold time t hd:dat 0.1 - - s data setup time t su:dat 0.1 - - s stop condition setup time t su:sto 0.6 - - s ? write protocol s slave address w a register address a write data ap 7bit = 5ch or 5dh 8bit 8bit ? read protocol s slave address w a register address a s slave address r a read data n p 7bit = 5ch or 5dh 8bit 7bit = 5ch or 5dh 8bit from master to slave s = start condition from slave to master p = stop condition r = data direction read (sda high) w = data direction write (sda low) a = acknowledge (sda low) n = not acknowledge (sda high) sda scl address ack ack ack data data t hd;sta t su;sto t su;dat t hd;dat sda scl technical note 5/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m eeprom i/f bu21023/bu21024 controllers include an eeprom interface for firmware download. device address of eeprom is set via register 0x51(eeprom_addr). timing chart parameter symbol limits unit condition min. typ. max. scl clock frequency f scl 270 310 350 khz start hold time t hd:sta 0.7 - 0.9 s scl ?l? width t low 1.4 - 1.8 s scl ?h? width t high 1.4 - 1.8 s data hold time t hd:dat 0.7 - 0.9 s data setup time t su:dat 0.7 - 0.9 s stop setup time t su:sto 0.7 - 0.9 s protocol *ic does not support the write command. *ic supports the following read command. sda scl address read /write ack ack ack data data t hd;sta t su;sto t su;dat t hd;dat s slave a ddress w 1st word a ddress 2nd word a ddress data(0) data(n-3) a a a a a data(n-2) a data(n-1) a data(n) p start stop n technical note 6/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m background information a resistive touch panel is made up of a mu ltilayer sandwich of resistive films and pr otective coatings all sitting on top of an lcd display. resistive touch panels work by direct contact of a stylus or a finger fl exing a pair of resi stive films, hence any blunt pointing instrument or a gloved finger may be used. touch panel resolution the resolution of a touch panel is typically measured in dots per inch (dpi) and is a function of the physical size of the touc h panel and the adc used in the conversion circuitry. for exam ple, a 3?x5? panel used with the bu21023/bu21024 devices can provide a theoretical resolution of 1024 /5 = 204 dpi. in the case of resistive t ouch panels, the direct contact nature of its operation and finger thickness often impose an upper limit on the effective system resolu tion that may be achieved, regardless of the resolution of the adc itself. functional description the bu21023/bu21024 devices connect to a standard 4-wire resi stive touch screen on one side and to a host processor on the other side. the bu21024 includes four additional sense terminals allowing it to be used with either 4-wire or 8-wire resistive touch screens. the bu21023/bu21024 include the analog and digital circuitry to process and provide dual touch coordinate data and pinch, spread, rotate-right and rota te-left gesture information to the host cpu. the bu21023/bu21024 devices include an internal cpu and prov ide a high degree of programmability by exposing a set of registers that can be accessed by a host cpu through spi or i 2 c like serial interfaces. the ifsel pin determines whether spi or i 2 c like interface is selected, the bu 21023/bu21024 devices include an int pin whose polarity can be programmed via registers. when an interrupt occurs, for example, due to touch detection, the host proce ssor is required to read an interrupt status register to determine the caus e of the interrupt and take appropriate action. the program memory of the internal cpu may be initialized via the host interface or vi a an external eeprom. this is selected by a register setting. the bu21023/bu21024 devices support two sensing modes; contin uous and interval sensing mo des, that are register selectable. in the continuous sensing mode, the embedded cpu reads z, x & y coordinates continuously when a touch is detected. the interval sensing mode allows a delay to be inserted between each cycle. the continuous sensing mode is used more often though the interval sensing mode minimizes po wer consumption. the continuous sensing mode typically completes a sampling cycle consisting of z, x & y measurements in approximately 2.3 ms. the bu21023/bu21024 devices enable optimization of touch detection threshold for a given panel. they also include several sophisticated calibration algorithms. this document includes a description of the registers followed by flow charts that descri be specific steps that a host processor must follow. often, a flow chart requires other flow charts to explain the steps in finer detail. the document also includes information on touch screen paramete rs that one should to look for while selecting resistive touch panels for multi-touch. technical note 7/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m block diagram / description of each block bu21023gul / bu21023muv screen i/f 4-wire resistive touch screen interface adc 10bit a/d converter osc internal 20mhz oscillator block with optional external clock input regulator internal regulator provides 1.8v dvdd supply. dvdd can also be supplied from an external source if dvdd_ext pin is tied high. clock generator system clock and timing generation (10mhz cpu clock) cpu core for dual touch processing, programmability and host interface work memory data memory for cpu program memory program memory for cpu. code can be downloaded by host processor or from an external eeprom eeprom i/f to connect to external eeprom if downloading program memory from eeprom. use of external eeprom is optional. host i/f 4-wire spi or 2-wire i 2 c like interface provides access to registers panel i/f regulato r pvdd a vdd dvdd dvdd_ext vdd vss rstb osc a dc (10bit) filter cpu (8bit) work memory program memor y eeprom i/f host i/f registe r clock generato r t1 t2 t3 t4 clk_ext xp ecl eda sel_csb scl_sc k sda_si so int yp xn yn ifsel technical note 8/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m bu21024fv-m screen i/f 4-wire or 8-wire resistive touch screen interface adc 10bit a/d converter osc internal 20mhz oscillator block with optional external clock input regulator internal regulator provides 1.8v dvdd supply. dvdd can also be supplied from an external source if dvdd_ext pin is tied high. clock generator system clock and timing generation (10mhz cpu clock) cpu core for dual touch processing, programmability and host interface work memory data memory for cpu program memory program memory for cpu. code can be downloaded by host processor or from an external eeprom eeprom i/f to connect to external eeprom if downloading program memory from eeprom. use of external eeprom is optional. host i/f 4-wire spi or 2-wire i 2 c like interface provides access to registers panel i/f regulator pvdd avdd dvdd dvdd_ext vdd vss rstb osc adc (10bit) filter cpu (8bit) work memory program memory eeprom i/f host i/f register clock generator t1 t2 t3 t4 clk_ext xp xpm ecl eda so int yp ypm xn xnm yn ynm ifsel sel_csb scl_sck sda_si technical note 9/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m pin description bu21023gul no. pin name i/o function fig. d1 yn i/o panel interface e c1 xn i/o panel interface e c2 yp i/o panel interface e b1 xp i/o panel interface e a1 t4 i/o test pin e a2 pvdd o regulator output (for supply panel voltage) - b3 avdd o regulator output (for supply analog block) - a3 dvdd i/o regulator output (for supply digital block) or supply digital voltage (dvdd_ext="h") - b4 dvdd_ext i digital voltage enable (h=hi-z , l=dvdd enable) e a4 vdd - supply voltage - a5 vss - ground - c3 rstb i h/w reset e b5 clk_ext i supply external clock for debug a c4 t1 i test pin a c5 t2 i test pin a d4 t3 i test pin a d5 ifsel i intereface select pin (l=spi, h=2wire serial) a d3 so o spi serila data output 2wire - f e5 int o interrupt output c d2 sel_csb i spi chip select 2wire slave address select c e4 sda_si i/o spi serial data input 2wire serial data in-out c e3 scl_sck i spi serial clock i nput 2wire serial clock input c e2 eda i/o eeprom sda c e1 ecl o eeprom scl c 1. please use 1.0uf capacitors between avdd and dvdd to gnd, and leave pvdd terminal open. 2. if dvdd_ext=?h ?, the dvdd pin can be connected to an external 1.8v power source. 3. please pull up the ecl, eda, and int pi ns using 10k ohm resistors as shown in the application diagram at the end of this do cument. ecl and eda pins may be directly connected to gnd if an exter nal eeprom is not being used. please connect a 0.1uf capacitor bet ween t4 and gnd. t1, t2 & t3 pins should be connected to gnd. 4. when using the 2 wire serial interface, please pull up the scl_sck, sda_si pins via 10k ohms and leave so unconnected. 5. please note that the values of resistors and capacitors mentioned here are only recommended values. 6. rstb should be held low until supply voltage vdd has ramped up and has reached a stable level. 7. the polarity of int pin is programmable via register 0x30 8. connect clk_ext to gnd for normal use top view (ball side down) bottom view (ball side up) 12345 a b c d e t4 pvdd dvdd vdd vss xp avdd dvdd_ext clk_ext xn yp rstb t1 t2 yn sel_csb so t3 ifsel ecl eda scl_sck sda_si int 12345 e d c b a t4 pvdd dvdd vdd vss xp avdd dvdd_ext clk_ext xn yp rstb t1 t2 yn sel_csb so t3 ifsel ecl eda scl_sck sda_si int technical note 10/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m bu21023muv no. pin name i/o function fig 1 nc - - - 2 nc - - - 3 nc - - - 4 yn i/o panel interface e 5 xn i/o panel interface e 6 yp i/o panel interface e 7 xp i/o panel interface e 8 t4 i/o test pin e 9 pvdd o regulator output (for supply panel voltage) - 10 avdd o regulator output (for supply analog block) - 11 dvdd i/o regulator output (for supply digital block) or supply digital voltage (dvdd_ext="h") - 12 dvdd_ext i digital voltage enable (h=hi-z , l=dvdd enable) e 13 vdd - supply voltage - 14 vss - ground - 15 rstb i h/w reset e 16 clk_ext i supply external clock for debug a 17 t1 i test pin a 18 t2 i test pin a 19 t3 i test pin a 20 ifsel i intereface select pin (l=spi, h=2wire serial) a 21 so o spi serila data output 2wire - f 22 int o interrupt output c 23 sel_csb i spi chip select 2wire slave address select c 24 sda_si i/o spi serial data input 2wire serial data in-out c 25 scl_sck i spi serial clock input 2wire serial clock input c 26 eda i/o eeprom sda c 27 ecl o eeprom scl c 28 nc - - - 1. please use 1.0uf capacitors between avdd and dvdd to gnd, and leave pvdd terminal open. 2. if dvdd_ext=?h ?, the dvdd pin can be connected to an external 1.8v power source. 3. please pull up the ecl, eda, and int pi ns using 10k ohm resistors as shown in the application diagram at the end of this do cument. ecl and eda pins may be directly connected to gnd if an exte rnal eeprom is not being used. pl ease connect a 0.1uf capacitor be tween t4 and gnd. t1, t2 & t3 pins should be connected to gnd. 4. when using the 2 wire serial interface, please pull up the scl_sck, sda_si pins via 10k ohms and leave so unconnected. 5. please note that the values of resistors and capacitors mentioned here are only recommended values. 6. rstb should be held low until supply voltage vdd has ramped up and has reached a stable level. 7. the polarity of int pin is programmable via register 0x30 8. connect clk_ext to gnd for normal use 22 int 23 24 25 26 27 28 sel_csb sda_si scl_sck eda ecl nc 1 nc 2 nc 3 nc 4 yn 5 xn 6 yp 7 xp 14 vss 13 12 11 10 9 8 vdd dvdd_ext dvdd avdd pvdd t4 21 so 20 ifsel 19 t3 18 t2 17 t1 16 clk_ext 15 rstb top view (lead side down) 28 int 27 26 25 24 23 22 sel_csb sda_si scl_sck eda ecl nc 21 nc 20 nc 19 nc 18 yn 17 xn 16 yp 15 xp 8 vss 9 10 11 12 13 14 vdd dvdd_ext dvdd avdd pvdd t4 1 so 2 ifsel 3 t3 4 t2 5 t1 6 clk_ext 7 rstb bottom view (lead side up) technical note 11/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m bu21024fv-m no. pin name i/o function fig 1 eda i/o eeprom sda c 2 ecl o eeprom scl c 3 ynm i/o panel interface (test input) e 4 xnm i/o panel interface (test input) e 5 ypm i/o panel interface (test input) e 6 xpm i/o panel interface (test input) e 7 yn i/o panel interface e 8 xn i/o panel interface e 9 yp i/o panel interface e 10 xp i/o panel interface e 11 t4 i/o test pin e 12 pvdd o regulator output (for supply panel voltage) - 13 avdd o regulator output (for supply analog block) - 14 dvdd i/o regulator output (for supply digital block) or supply digital voltage (dvdd_ext="h") - 15 dvdd_ext i digital voltage enable (h=hi-z , l=dvdd enable) e 16 vdd - supply voltage - 17 vss - ground - 18 rstb i h/w reset e 19 clk_ext i supply external clock for debug a 20 t1 i test pin a 21 t2 i test pin a 22 t3 i test pin a 23 ifsel i intereface select pin (l=spi, h=2wire serial) a 24 so o spi serila data output 2wire - f 25 int o interrupt output c 26 sel_csb i spi chip select 2wire slave address select c 27 sda_si i/o spi serial data input 2wire serial data in-out c 28 scl_sck i spi serial clock input 2wire serial clock input c 1. please use 1.0uf capacitors between avdd and dvdd to gnd, and leave pvdd terminal open. 2. if dvdd_ext=?h ?, the dvdd pin can be connected to an external 1.8v power source. 3. please pull up the ecl, eda, and int pi ns using 10k ohm resistors as shown in the application diagram at the end of this do cument. ecl and eda pins may be directly connected to gnd if an exte rnal eeprom is not being used. pl ease connect a 0.1uf capacitor be tween t4 and gnd. t1, t2 & t3 pins should be connected to gnd. 4. when using the 2 wire serial interface, please pull up the scl_sck, sda_si pins via 10 k ohms and leave so unconnected. 5. please note that the values of resistors and capacitors mentioned here are only recommended values. 6. rstb should be held low until supply voltage vdd has ramped up and has reached a stable level. 7. the polarity of int pin is programmable via register 0x30 8. connect clk_ext to gnd for normal use 9. please leave the xpm, xnm, ypm, ynm te rminals open if using a 4-wire touch screen . these pins should be connected to the re ference leads of an 8-wire touch screen if one is being used. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 int sel_csb sda_si scl_sck eda ecl ynm xnm ypm xpm yn xn yp xp vss vdd dvdd_ext dvdd avdd t4 pvdd so ifsel t3 t2 t1 clk_ext rstb top view top view technical note 12/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m pad pad pad pad pad cin pad fig. bu21023gul / bu21023muv / bu21024fv-m i/o equivalent circuit fig. a fig. b fig. c fig. d fig. e fig. f technical note 13/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m application circuit bu21023gul/bu21023muv bu21023gul/muv support 2 host interfaces (4-wire spi and 2-wire serial bus). the figures below are shown application circuit when each interface is used. (although bu21023gul is csp package, it is shown in similar figure for comparing.) *please connect the te rminal of ecl/eda with vss, when firmware is download form host. *please insert tvs diode each sensor line from t he perspective that enhances resistance to esd. *in 4-wire spi using case, pull up int te rminal to vdd or host io voltage (max4.5v). if no using, connect to gnd. bu21023 yn xn host yp xp t4 pvdd avdd dvdd dvdd_ext vdd vss sel_csb scl_sck sda_si eda ecl int so ifsel t3 t2 t1 ext_clk rstb vdd eeprom vdd vdd panel 0.1uf 1.0uf 1.0uf 10kohm 10kohm 10kohm (10kohm) tvs diode example 1 : bu21023gul/muv application circuit(4-wirespi) in 2-wire serial interface using case, please pull up int, scl_sck , sda_si terminal to vdd or host io voltage(max4.5v). bu21023 yn xn host yp xp t4 pvdd avdd dvdd dvdd_ext vdd vss sel_csb scl_sck sda_si eda ecl int so ifsel t3 t2 t1 ext_clk rstb vdd eeprom vdd vdd panel 0.1uf 1.0uf 1.0uf 10kohm 10kohm 10kohm 10kohm 10kohm tvs diode example 2 : bu21023gul/muv application circuit(2-wire serial bus) technical note 14/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m bu21024fv-m bu21024fv-m support 2 host interfaces (4-wire spi and 2-wire serial bus). the figures below are shown application circuit when each interface is used. (although bu21023gul is csp package, it is shown in similar figure for comparing.) *please connect the te rminal of ecl/eda with vss, when firmware is download form host. *please insert tvs diode each sensor line from t he perspective that enhances resistance to esd. *in 4-wire spi using case, pull up int te rminal to vdd or host io voltage(max4.5v). if no using, connect to gnd. bu21024fv-m 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 int sel_csb sda_si scl_sck eda ecl ynm xnm ypm xpm yn xn yp xp vss vdd dvdd_ext dvdd avdd t4 pvdd so ifsel t3 t2 t1 clk_ext rstb eeprom panel vdd 10kohm 10kohm vdd vdd (10kohm) 0.1uf 1.0uf 1.0uf tvs diode host vdd 10kohm example 3 : bu21024fv-m application circuit(4-wirespi) bu21024fv-m 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 int sel_csb sda_si scl_sck eda ecl ynm xnm ypm xpm yn xn yp xp vss vdd dvdd_ext dvdd avdd t4 pvdd so ifsel t3 t2 t1 clk_e xt rstb eeprom panel host vdd 10kohm 10kohm vdd vdd 0.1uf 1.0uf 1.0uf tvs diode vdd vdd 10kohm example 4 : bu21024fv-m application circuit(2-wire serial bus) technical note 15/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m bu21024fv-m has the other pins for debug except for 4-wi re resistive touch screen interface (xp, yp, xn, yn). when debug, there are 4 monitor pins corresponding to four past terminals. (in 4-wire, supply and detect voltage of screen on 4 pins. when debug, if this function is enable, it is possible to supply voltage on past 4pins and detect voltage on 4 pins with **m separately. ) to remove the noise of scre en itself, the filter is composed of discrete circuit. it is possible to ease the decrease of screen voltage's dynamic range, which is caused by wiring resistance on the pcb. note: these debug terminals are only for debug. so, pl ease don?t use them in normal application using. bu21024fv-m 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 int sel_csb sda_si scl_sck eda ecl ynm xnm ypm xpm yn xn yp xp vss vdd dvdd_ext dvdd avdd t4 pvdd so ifsel t3 t2 t1 clk_ext rstb eeprom panel vdd 10kohm 10kohm vdd vdd (10kohm) 0.1uf 1.0uf 1.0uf tvs diode host vdd 10kohm 1nf 1nf 1nf 1nf 10 ohm 10 ohm 10 ohm example 5 : bu21024fv-m application circuit(4-wirespi with rc filter) bu21024fv-m 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 int sel_csb sda_si scl_sck eda ecl ynm xnm ypm xpm yn xn yp xp vss vdd dvdd_ext dvdd avdd t4 pvdd so ifsel t3 t2 t1 clk_ext rstb eeprom panel host vdd 10kohm 10kohm vdd vdd 0.1uf 1.0uf 1.0uf tvs diode vdd vdd 10kohm 10 ohm 1nf 1nf 1nf 1nf 10 ohm 10 ohm 10 ohm example 6 : bu21024fv-m application circuit(2-wire serial bus with rc filter) technical note 16/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m notes for use (1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices thus making impossible to identify breaking mode such as a short circuit or an open circuit. if any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) operating conditions these conditions represent a range within which characteri stics can be provided approx imately as expected. the electrical characteristics are guaranteed under the conditions of each parameter. (3) reverse connection of power supply connector the reverse connection of power supply connector can br eak down ics. take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the ic's power supply terminal. (4) power supply line design pcb pattern to provide low impedance for the wiring between the power supply and the gnd lines. in this regard, for the digital block power supply and the analog block po wer supply, even though these power supplies has the same level of potential, separat e the power supply pattern for the digital block fr om that for the analog bl ock, thus suppressing the diffraction of digital noises to the analog block powe r supply resulting from impedance common to the wiring patterns. for the gnd line, give consi deration to design the patterns in a similar manner. furthermore, for all power supply terminals to ics, mount a capacit or between the power supply and the gnd terminal. at the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the c apacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) gnd voltage make setting of the potential of the gnd te rminal so that it will be maintained at the minimum in an y operating state. furthermore, check to be sure no terminals are at a potential lower than the gnd voltage including an actual electric transient. (6) short circuit between terminals and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to the direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the gnd terminal, the ics can break down. (7) operation in strong electromagnetic field be noted that using ics in the strong elec tromagnetic field can malfunction them. (8) inspection with set pcb on the inspection with the set pcb, if a capacitor is connec ted to a low-impedance ic termi nal, the ic can suffer stress. therefore, be sure to discharge from the set pcb by each pr ocess. furthermore, in order to mount or dismount the set pcb to/from the jig for the inspection process, be sure to turn off the power supply and then mount the set pcb to the jig. after the completion of the inspection, be sure to turn off the power supply and th en dismount it from the jig. in addition, for protection against static electricity, establish a ground for th e assembly process and pay thorough attention to the transportation and t he storage of the set pcb. (9) input terminals in terms of the construction of ic, parasit ic elements are inevitably formed in re lation to potential. the operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. therefore, pay thoro ugh attention not to handle the input termi nals, such as to apply to the input terminals a voltage lower than the gnd respectively, so that any parasitic element will operate. furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the ic. in addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electr ical characteristics. (10) ground wiring pattern if small-signal gnd and large-current gnd are provided, it will be recommended to separate the large-current gnd pattern from the small-signal gnd pattern and establish a si ngle ground at the reference poi nt of the set pcb so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal gnd. pay att ention not to cause fluctuations in the gnd wiring pattern of external parts as well. (11) external capacitor in order to use a ceramic capacitor as the external capaci tor, determine the constant wi th consideration given to a degradation in the nominal capacitance due to dc bias and changes in the capacitance du e to temperature, etc. (12) rush current the ic with some power supplies has a capable of rush curr ent due to procedure and dela y at power-on. pay attention to the capacitance of the coupling condensers and the wiring pattern width and routing of the power supply and the gnd lines. (13) others in case of use this lsi, please peruse some other detail doc uments, we called, technical note, functional description, application note. technical note 17/17 www.rohm.com 2011.08 - rev. a ? 2011 rohm co., ltd. all rights reserved. bu21023gul,bu2102 3muv,bu21024fv-m ordering part number b u 2 1 0 2 4 f v - m e 2 part no. part no. 21023 21024 package gul : vcsp50l2 muv: vqfn028v5050 fv : ssop-b28 packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. |
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